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May the Dimensity 9400, not the Snapdragon 8 Gen 4, be the chipset to beat later this 12 months?

MediaTek rolled the cube with the Dimensity 9300 software processor and it paid off for the corporate. What MediaTek did was  take away the low-power Effectivity CPU cores (which in all probability would have been the Cortex-A520) and as a substitute configured the chip to incorporate 4 Cortex-X4 Prime CPU cores operating as much as 3.25GHz together with  4 Cortex-A720 Efficiency CPU cores as quick as 2GHz.
So what is going to MediaTek do for an encore? We have already heard some rumors in regards to the Dimensity 9400 and now leaker Digital Chat Station (by way of Wccftech) has the most recent data on this part. Just like the Dimensity 9300, the Dimensity 9400 will skip the low-power Effectivity cores and use a mix of Cortex-X5, Cortex-X4 and Cortex-A7xx Efficiency CPU cores. One risk thrown out by Wccftech would come with a configuration made up of 1 Cortex-X5 core, three Cortex-X4 cores, and 4 Cortex-A7xx cores.
Assuming that once we speak in regards to the Dimensity 9400 as being a scorching chip, we’re discussing demand for the SoC, MediaTek goes to have a winner on its arms. The Dimensity 9300 has reportedly generated $1 billion in income for the corporate, and experiences say that Vivo has already signed as much as take supply of the brand new AP which China Occasions says runs 20% “higher,” no matter meaning, than the Dimensity 9300 SoC.

The principle rival for the Dimensity 9400 chipset is the Snapdragon 8 Gen 4 SoC. Qualcomm is alleged to be pricing the brand new flagship Snapdragon chipset within the stratosphere which may give MediaTek a hook to hold Dimensity 9400 AP gross sales on.

Digital Chat Station says that first, MediaTek is tentatively scheduled to launch the Dimensity 9300+ SoC in Could with the Cortex-X4 operating at 3.4GHz. The leaker says that this chipset will function Arm’s Immortalis-G720 MC12 GPU. The Dimensity 9400 is tentatively scheduled for an October debut and is being constructed by TSMC utilizing its 3nm course of node.

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